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General • Re: PIO+DMA w/ offset?

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22 cycles is only for the first read, but you don't have to repeat the command for the rest. After that it can be reduced to 16/14 cycles by using Transfer Chaining
Depending on the length of the dummy, (usual Winbond = 4) it can go at 140 MHz QSPI clock, in around 100ns first byte.
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Statistics: Posted by gmx — Mon Sep 30, 2024 5:26 am



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