Welcome, and nice work !
This is what I've got: https://forums.raspberrypi.com/viewtopi ... 5#p2307164
Used: qmi_hw->m[1].timing= 0x60460201;
Though I would not call "accessing 1024 randomly generated addresses in chunks of 1024 bytes" as "random RW", when it is still (actually optimized) sequential access without crossing pages, just the pages are random (irrelevant).
This is what I've got: https://forums.raspberrypi.com/viewtopi ... 5#p2307164
Used: qmi_hw->m[1].timing= 0x60460201;
Though I would not call "accessing 1024 randomly generated addresses in chunks of 1024 bytes" as "random RW", when it is still (actually optimized) sequential access without crossing pages, just the pages are random (irrelevant).
150 MHz CPU / 1 = 150 MHz (overclocked) PSRAM (tuned timings):
uncached 32-bitand interestingly (weird) enough cached 32-bit:Code:
clk_ref 12.000000 MHzclk_sys 150.000000 MHzclk_peri 150.000000 MHz----- START SEQUENTIAL WRITE8388608 bytes / 182518us = 45.960442 MB/s----- START SEQUENTIAL READ+CHECK ... errors=08388608 bytes / 309876us = 27.070854 MB/s----- START pseudoRANDOM WRITE8388608 bytes / 307473us = 27.282421 MB/s----- START pseudoRANDOM READ+CHECK ... errors=08388608 bytes / 503207us = 16.670292 MB/sProbably this is the explanation:Code:
clk_ref 12.000000 MHzclk_sys 150.000000 MHzclk_peri 150.000000 MHz----- START SEQUENTIAL WRITE8388608 bytes / 502568us = 16.691488 MB/s----- START SEQUENTIAL READ+CHECK ... errors=08388608 bytes / 289480us = 28.978195 MB/s----- START pseudoRANDOM WRITE8388608 bytes / 502394us = 16.697269 MB/s----- START pseudoRANDOM READ+CHECK ... errors=08388608 bytes / 370756us = 22.625683 MB/sThe number of SCK cycles issued for each access depends on the access size, which varies between one byte and one
cache line. For example, an uncached one-byte read by a processor will fetch exactly one byte of data over the QSPI bus,
to avoid wasting time fetching unwanted data. Cache misses are always issued as 64-bit QSPI transfers.
Statistics: Posted by gmx — Sat Apr 12, 2025 6:55 pm