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Interfacing (DSI, CSI, I2C, etc.) • Re: RP1 PIO issues with FIFO or DMA underflow

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Thank you both for looking into this.

I have added a nop [30] to my example to run with clkdiv 1.0, closer reflecting my real application. Same effect, so I think we can rule out clock issues.

Experimenting with pio_sm_set_dmactrl,

Code:

pio_sm_set_dmactrl(iq_pio, iq_sm, false, 0xc0000108)
seems to fix the issue for the simple example, and based on very cursory tests also my real code.

edit: typos

Statistics: Posted by astuder — Wed Jan 07, 2026 7:35 pm



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