If this was multimeter testing, then the 2.6V is entirely reasonable - if the nCS pin was active (ie. the flash was being used) but only at about 20% duty cycle.
You can't readily debug the bootsel mechanism with a voltmeter, as things happen too quickly. At power-up, the pin obviously starts off low as it's been powered off, the on-chip soft pull-up is enabled and the bootsel button may or may not be applying a firm pull-down; after a short while, the bootrom software samples the pin state (low if button pressed, high if not), then enables the nCS output (whose idle state is high, and driven with enough strength to overpower the bootsel resistor). So regardless of the bootsel state you are going to see the pin rise from low to high shortly after power-up.
As regards the "how to lay out a PSU" question, in the absence of the PSU manufacturer having done this for you, the key concern is to think about the loops around which large current flows - and then to keep those loops as short and low-impedance as possible (wide track, avoid use of via holes, shuffle component locations/orientations to minimise these). The size of these loops will directly affect the amount of EMI generated even if the PSU is working fine, and if bad enough will affect the stability of the PSU. Other connections - like the voltage sense or control inputs - which don't have high current can take longer routes or go up and down via holes if required.
For a buck converter there are two loops:
When the switch is on, starting from your input capacitor, through the switching transistor (in and out of pins on the chip for a single-chip design), through the inductor, into the output capacitor, and back from the ground side of the output capacitor to the ground side of the input capacitor.
When the switch is off, the loop is from ground, through the flyback diode (or the bottom FET between GND and switch pins on the chip), through the inductor, into the output capacitor, and back from the ground side of the output capacitor to the diode or GND pin on the chip.
Note the ground connections in those loops: current flows round a loop, and the grounds are equally important: the current doesn't care that you've put a label saying GND on that part of its path, nor that there's a huge groundplane elsewhere on the board as the current we are talking about isn't flowing through that (or if it is, you've totally messed up as your loop is now huge!). Normally you can shuffle the components so that the ground currents all stay on the top side - often with the ground path going underneath the chip, with the input capacitor at one end, the output capacitor at the other end and the inductor to the side, particularly if the PSU chip's GND connection is a belly pad.
The chip in this design is a buck-boost, so there's two pairs of loops to consider (when it's in buck mode or boost mode), but they are similar and if running off USB power it will be permanently in buck mode anyhow.
You can't readily debug the bootsel mechanism with a voltmeter, as things happen too quickly. At power-up, the pin obviously starts off low as it's been powered off, the on-chip soft pull-up is enabled and the bootsel button may or may not be applying a firm pull-down; after a short while, the bootrom software samples the pin state (low if button pressed, high if not), then enables the nCS output (whose idle state is high, and driven with enough strength to overpower the bootsel resistor). So regardless of the bootsel state you are going to see the pin rise from low to high shortly after power-up.
As regards the "how to lay out a PSU" question, in the absence of the PSU manufacturer having done this for you, the key concern is to think about the loops around which large current flows - and then to keep those loops as short and low-impedance as possible (wide track, avoid use of via holes, shuffle component locations/orientations to minimise these). The size of these loops will directly affect the amount of EMI generated even if the PSU is working fine, and if bad enough will affect the stability of the PSU. Other connections - like the voltage sense or control inputs - which don't have high current can take longer routes or go up and down via holes if required.
For a buck converter there are two loops:
When the switch is on, starting from your input capacitor, through the switching transistor (in and out of pins on the chip for a single-chip design), through the inductor, into the output capacitor, and back from the ground side of the output capacitor to the ground side of the input capacitor.
When the switch is off, the loop is from ground, through the flyback diode (or the bottom FET between GND and switch pins on the chip), through the inductor, into the output capacitor, and back from the ground side of the output capacitor to the diode or GND pin on the chip.
Note the ground connections in those loops: current flows round a loop, and the grounds are equally important: the current doesn't care that you've put a label saying GND on that part of its path, nor that there's a huge groundplane elsewhere on the board as the current we are talking about isn't flowing through that (or if it is, you've totally messed up as your loop is now huge!). Normally you can shuffle the components so that the ground currents all stay on the top side - often with the ground path going underneath the chip, with the input capacitor at one end, the output capacitor at the other end and the inductor to the side, particularly if the PSU chip's GND connection is a belly pad.
The chip in this design is a buck-boost, so there's two pairs of loops to consider (when it's in buck mode or boost mode), but they are similar and if running off USB power it will be permanently in buck mode anyhow.
Statistics: Posted by arg001 — Mon Mar 03, 2025 8:47 am